-makelib ies/xil_defaultlib -sv \
  "C:/Xilinx/Vivado/2017.1/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \
  "C:/Xilinx/Vivado/2017.1/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv" \
-endlib
-makelib ies/xpm \
  "C:/Xilinx/Vivado/2017.1/data/ip/xpm/xpm_VCOMP.vhd" \
-endlib
-makelib ies/xil_defaultlib \
  "../../../../lab1a_comp_verilog.srcs/sources_1/ip/PLL_Block_1/PLL_Block_clk_wiz.v" \
  "../../../../lab1a_comp_verilog.srcs/sources_1/ip/PLL_Block_1/PLL_Block.v" \
-endlib
-makelib ies/xil_defaultlib \
  glbl.v
-endlib

